
Chapter 1
Overview
The primary objective of this manual is to describe the functionality of the MPC8272ADS
board. It contains operational, functional and general information about the
MPC8272ADS. This board is meant to serve as a platform for software and hardware
development for the MPC8272 processor in a TEPBGA package (516 Pins in Hip7). The
high-performance MPC8272 PowerQUICC II? processor family contains a PowerPC?
core and addresses the needs of a wide variety of networking and communications
applications.
Using its on-board resources and a debugger, a developer can download code, run it, set
breakpoints, display memory and registers and connect proprietary hardware using the
expansion connectors, to be incorporated into a desired system with the MPC8272
processor.
This board could also be used as a demonstration tool (for example, application software
may be programmed either on- or off-board into its Flash memory and run in exhibitions).
1.1
MPC8272ADS Specifications
Table 1-1 shows the MPC8272ADS specifications.
Table 1-1. MPC8272ADS specifications
CHARACTERISTICS
Power requirements (no other boards attached)
Microprocessor
Addressing
Total address range on PPC bus:
Total address range on Local bus:
Flash Memory SIMM (PPC bus)
Synchronous Dynamic RAM DIMM (PPC bus)
SPECIFICATIONS
+5Vdc @ TBD A (Typ.), TBD A (Max.)
+3.3Vdc @ TBD A (Typ.), TBD A (Max.)
+12Vdc - @TBD A Max.
-12Vdc - @TBD A Max.
MPC8272 running @ up to 100 MHz bus clock frequency.
4 GBytes (32 address lines)
256 KBytes External (18 address lines)
4 GBytes Internal (32 address lines internal decoding)
8 MByte, 32 bits wide expandable to 32 MBytes
64 MByte, 64 bits wide
Chapter 1. Overview